Kontrol esparruan ikasketa eta garapenerako oinarrizko ingurune praktiko, ireki eta askea

Embedded system design (VHDL description) based on Xilinx's Spartan3E Development Kit to perform real-time PID control and monitoring of DC motors.Benetako denborak aginduta, kontrolagailu jarraituaren erantzun baliokidea duen kontrol-sistema digital modularra, txertatua eta autonomoa FPGA batean inplementatzea eta kontrola gauzatzea

Kontrol esparruan ikasketa eta garapenerako oinarrizko ingurune praktiko, ireki eta askea

Embedded system design (VHDL description) based on Xilinx's Spartan3E Development Kit to perform real-time PID control and monitoring of DC motors.Benetako denborak aginduta, kontrolagailu jarraituaren erantzun baliokidea duen kontrol-sistema digital modularra, txertatua eta autonomoa FPGA batean inplementatzea eta kontrola gauzatzea

Adaptive Scalable SVD Unit for Fast Processing of Large LSE Problems

Singular Value Decomposition (SVD) is a key linear algebraic operation in many scientific and engineering applications. In particular, many computational intelligence systems rely on machine learning methods involving high dimensionality datasets that have to be fast processed for real-time adaptability. In this paper we describe a practical FPGA (Field Programmable Gate Array) implementation of a SVD processor for accelerating the solution of large LSE problems. The design approach has been comprehensive, from the algorithmic refinement to the numerical analysis to the customization for an efficient hardware realization. The processing scheme rests on an adaptive vector rotation evaluator for error regularization that enhances convergence speed with no penalty on the solution accuracy. The proposed architecture, which follows a data transfer scheme, is scalable and based on the interconnection of simple rotations units, which allows for a trade-off between occupied area and processing acceleration in the final implementation. This permits the SVD processor to be implemented both on low-cost and highend FPGAs, according to the final application requirements.This work was supported by the Spanish Ministry of Economy and Competitiveness, and European FEDER funds (grant TEC2010-15388), and by the Basque Government (grants IT733-13, S-PC12UN016, and S-PC13UN034)